Title：Test Cost Reduction for Logic Circuits -Reduction of test data volume and testing time-
Authors: Yoshinobu Higami, Seiji Kajihara, Hideyuki Ichihara, Yuzo Takamatsu
Jounrnals：IEICE Trans. D-I
Volume: J87-D-I
Number: 3
Pages: 291-307
Published Month: 3
Published Year: 2004
Type: article
Abstract:
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Reference: http://harp.lib.hiroshima-u.ac.jp/handle/harp/4751
