Title：Optimal Contexts for the Self-Test of Coarse Grain Dynamically Reconfigurable Processors
Authors: Tomoo Inoue, Takashi Fujii, Hideyuki Ichihara
Jounrnals：Proc. European Test Symp.
Published Month: 5
Published Year: 2007
This paper proposes a self-test method of dynamically reconfigurable processors (DRPs) without area overhead. This method constructs a test flame of processor elements (PEs) such that it consists of test pattern generators, response analyzers and PEs under test, and switches several test flames dynamically so as to test all the PEs. Since the structure of a test flame decides the number of contexts and test application time, we design several test flames with different structures and discuss the relationship of the structures to the number of contexts and test application time. Based on this discussion, we can construct the best test flame according to a given test environment. applications of test data to the configured system. The time required for configuration of an FPGA is much larger than the cycle time of the configured system, and hence many literatures focused on reducing the number of configurations for reduction in the total test application time. Unlike FPGAs, however, a DRP can reconfigure itself dynamically at operational speed, and therefore, in order to perform test application for DRPs efficiently, an appropriate combination of the set of contexts and test data to be applied to the configured systems must be required. Katoh and Ito  proposed a built-in self-test (BIST)