Title：A synthesis method to alleviate over-testing of delay faults based on RTL don't care path identification
Authors: Yuki Yoshikawa, Satoshi Ohtake, Tomoo Inoue, Hideo Fujiwara
Jounrnals：VLSI test symposium (VTS09)
Pages: 71-76
Published Month: 5
Published Year: 2009
Type: inproceedings
