Title:A design of testable response analyzers in built-in self-test

Authors: Yuki Fukazawa, Yuki Yoshikawa, Hideyuki Ichihara, Tomoo Inoue

Jounrnals:IEICE Tech. Repo.

Volume: 109

Number: 11

Pages: 37-42

Published Month: 4

Published Year: 2009

Type: techreport

In the BIST(Built-in self-test) scheme, the occurrence of faults in BIST circuits, e.g., test generators and response compactors, causesunreliable testing of chips, so that it results in filed defects of the chips and yield loss.In this study, we focus on a concurrent testability of BIST circuits. Testing a circuit-under-test (CUT) , a concurrently testable BIST circuit can test itself, and distinguish the faults in the BIST circuits from those in the CUT based on an obtained signature.We propose a concurrently testable response compactor, called a coding response compactor, and present two instances of coding response compactors, which are based on repetition codes and cyclic codes. Experimental results show the relationship between the concurrently testability and area overhead for the proposed coding response compactors.