タイトル：Efficient path delay test generation based on stuck-at test generation using checker circuitry
著者: Tsuyoshi Iwagaki, Satoshi Ohtake, Mineo Kaneko, Hideo Fujiwara
雑誌名：Proc. IEEE/ACM International Conference on Computer-Aided Design (ICCAD '07)
ページ: 418-423
発行月: 11
発行年: 2007
タイプ: inproceedings
リファレンス: http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=04397301
