タイトル：A path delay test generation method for sequential circuits based on reducibility to combinational test generation
著者: Tsuyoshi Iwagaki, Satoshi Ohtake, Hideo Fujiwara
雑誌名：Digest of Papers 8th IEEE European Test Workshop (ETW '03)
ページ: 307-312
発行月: 5
発行年: 2003
タイプ: inproceedings
