Title：A path delay test generation method for sequential circuits based on reducibility to combinational test generation
Authors: Tsuyoshi Iwagaki, Satoshi Ohtake, Hideo Fujiwara
Jounrnals：Digest of Papers 8th IEEE European Test Workshop (ETW '03)
Pages: 307-312
Published Month: 5
Published Year: 2003
Type: inproceedings
