Title：A test generation framework using checker circuits and its application to path delay test generation
Authors: Tsuyoshi Iwagaki, Satoshi Ohtake, Mineo Kaneko, Hideo Fujiwara
Jounrnals：IEICE Technical Report (CAS2006-76)
Volume: 106
Number: 512
Pages: 37-42
Published Month: 1
Published Year: 2007
Type: techreport
