Title：Utilizing register transfer level false paths for circuit optimization with a logic synthesis tool
Authors: Tsuyoshi Iwagaki, Takehiro Mikami, Hideyuki Ichihara, Tomoo Inoue
Jounrnals：Proc. IEEE Asia Pacific Conference on Circuits and Systems
Pages: 615--618
Published Month: 12
Published Year: 2012
Type: inproceedings
