Title:Architecture of Multiply-Accumulate Operation with Stochastic Iteration

Authors: Tatsuyoshi Sugino, Hideyuki Ichihara, Tsuyoshi Iwagaki, Tomoo Inoue

Jounrnals:IEICE Tech. Repo., vol. 116, no. 478, VLD2016-130

Pages: 157-162

Published Month: 3

Published Year: 2017

Type: techreport

Abstract:
Stochastic computing, which is an approximate computation method with probabilities (called stochastic numbers), draws attention as an alternative method of deterministic computing.
Compared with today's mainstream deterministic computing (or binary computing), SC requires considerably small hardware implementation, so that it can achieve small power consumption, possessing tolerance for its transient faults.
Since today's nanometer-scale logic circuits are vulnerable to errors, such as soft errors caused by neutrons or alpha particles from cosmic rays or package material, SC shows promise in such situations.
In this paper, we discuss a design method of stochastic computing circuits for multiply-accumulate operation in terms of reliability.
From the viewpoint of reliability, we discuss a design of {em purely} stochastic computing circuits for multiply-accumulate operation. A previous SC circuit for multiply-accumulate operation employs many deterministic numbers, such that binary numbers, so that it loses its reliability. We propose a design of purely stochastic computing circuit without such reliability loss. Experimental results show that the proposed design can achieve high reliability without losing its accuracy.

Reference: http://www.ieice.org/ken/paper/20170303Vbs4/